Field effect transistors and methods of forming a field effect transistor

ABSTRACT

The invention includes capacitors, capacitor forming methods, field effect transistors, and field effect transistor forming methods. In one aspect, a method of forming a layer including tungsten oxide includes forming a first layer including tungsten nitride over a substrate. In one implementation, the tungsten nitride is oxidized under conditions effective to form a second layer at least a majority of which is tungsten trioxide. In one aspect, a capacitor forming method includes forming a first capacitor electrode layer over a substrate. A second layer including tungsten nitride is formed over the first capacitor electrode layer. A third capacitor electrode layer is formed over the second layer. The second layer is oxidized under conditions effective to transform at least some of the tungsten nitride into a tungsten trioxide comprising capacitor dielectric layer. Other capacitor forming methods are contemplated. The invention also includes capacitors formed by these and other methods. In one aspect, a method of forming a field effect transistor includes forming a tungsten nitride comprising layer proximate at least one of a semiconductive channel region or a conductive gate layer. The tungsten nitride comprising layer is oxidized under conditions effective to transform at least some of the tungsten nitride to a tungsten oxide comprising gate dielectric layer. A transistor gate is provided operably proximate the gate dielectric layer, and source/drain regions are provided operably proximate the transistor gate. The invention also includes field effect transistors formed by this and other methods.

TECHNICAL FIELD

[0001] This invention relates to capacitors and capacitor formingmethods. This invention also related to field effect transistors, and tomethods of forming field effect transistors.

BACKGROUND OF THE INVENTION

[0002] As DRAMs increase in memory cell density, there is a continuingchallenge to maintain sufficiently high storage capacitance despitedecreasing cell area. Additionally, there is a continuing goal tofurther decrease cell area. One principal way of increasing cellcapacitance is through cell structure techniques. Such techniquesinclude three-dimensional cell capacitors, such as trenched or stackedcapacitors. Yet as feature size continues to become smaller and smaller,development of improved materials for cell dielectrics as well as thecell structure are important. The feature size of 256 Mb DRAMs will beon the order of 0.25 micron or less, and conventional dielectrics suchas SiO₂ and Si₃N₄ might not be suitable because of small dielectricconstants.

[0003] Insulating inorganic metal oxide materials, such as ferroelectricmaterials or perovskite materials or pentoxides such as tantalumpentoxide, have high dielectric constants and low leakage current whichmake them attractive as cell dielectric materials for high density DRAMsand non-volatile memories. Despite the advantages of high dielectricconstants and low leakage, insulating inorganic metal oxide materialssuffer from many drawbacks. For example, all of these materialsincorporate oxygen or are otherwise exposed to oxygen for densificationto produce the desired capacitor dielectric layer. Unfortunately, theprovision of such layers or subjecting such layers to oxidationdensification can undesirably oxidize the underlying bottom or lowerstorage node electrode where such is made of a readily oxidizablematerial. For example, Ta₂O₅ is typically subjected to an anneal in thepresence of an oxygen ambient. The anneal drives any carbon present outof the layer and advantageously injects additional oxygen into the layersuch that the layer uniformly approaches a stoichiometry of five oxygenatoms for every two tantalum atoms. The oxygen anneal is commonlyconducted at a temperature of from about 400° C. to about 1000° C.utilizing one or more of O₃, N₂O and O₂. The oxygen containing gas istypically flowed through a reactor at a rate of from about 0.5 slm toabout 10 slm.

[0004] Dielectric materials are also used for gate dielectric regions infield effect transistors between a conductive gate and a semiconductivechannel region. This invention is directed to improved methods andconstructions associated with transistors and capacitors, particularlywhere higher dielectric constants are desired.

SUMMARY

[0005] The invention comprises capacitors, capacitor forming methods,field effect transistors, and field effect transistor forming methods.In one aspect, a method of forming a layer including tungsten oxideincludes forming a first layer including tungsten nitride over asubstrate. In one implementation, the tungsten nitride layer is oxidizedunder conditions effective to form a second layer which comprisestungsten oxide. In one implementation, the tungsten nitride is oxidizedunder conditions effective to form a second layer at least a majority ofwhich is tungsten trioxide. In one aspect, a capacitor forming methodincludes forming a first capacitor electrode layer over a substrate. Asecond layer including tungsten nitride is formed over the firstcapacitor electrode layer. A third capacitor electrode layer is formedover the second layer. The second layer is oxidized under conditionseffective to transform at least some of the tungsten nitride into atungsten trioxide comprising capacitor dielectric layer. Other capacitorforming methods are contemplated. The invention also includes capacitorsformed by these and other methods.

[0006] In one aspect, a method of forming a field effect transistorincludes forming a tungsten nitride comprising layer proximate at leastone of a semiconductive channel region or a conductive gate layer. Thetungsten nitride comprising layer is oxidized under conditions effectiveto transform at least some of the tungsten nitride to a tungsten oxidecomprising gate dielectric layer. A transistor gate is provided operablyproximate the gate dielectric layer, and source/drain regions areprovided operably proximate the transistor gate. The invention alsoincludes field effect transistors formed by this and other methods.

BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Preferred embodiments of the invention are described below withreference to the following accompanying drawings.

[0008]FIG. 1 is a diagrammatic sectional view of a semiconductor wafer1. fragment at one processing step in accordance with an aspect of theinvention.

[0009]FIG. 2 is a view of the FIG. 1 wafer at a processing stepsubsequent to that shown by FIG. 1.

[0010]FIG. 3 is a view of the FIG. 2 wafer fragment at a processing stepsubsequent to that shown by FIG. 2.

[0011]FIG. 4 is a diagrammatic sectional view of an alternate embodimentsemiconductor wafer fragment at a processing step in accordance with theinvention.

[0012]FIG. 5 is a view of the FIG. 4 wafer fragment at a processing stepsubsequent to that shown by FIG. 4.

[0013]FIG. 6 is a view of the FIG. 4 wafer fragment at a processing stepsubsequent to that shown by FIG. 5.

[0014]FIG. 7 is a diagrammatic sectional view of an alternate embodimentsemiconductor wafer fragment at a processing step in accordance with theinvention.

[0015]FIG. 8 is a view of the FIG. 7 wafer at a processing stepsubsequent to that shown by FIG. 7.

[0016]FIG. 9 is a diagrammatic sectional view of another alternateembodiment semiconductor wafer fragment in accordance with an aspect ofthe invention.

[0017]FIG. 10 is a diagrammatic sectional view of still anotheralternate embodiment semiconductor wafer fragment in accordance with anaspect of the invention.

[0018]FIG. 11 is a view of the FIG. 10 wafer fragment at a processingstep subsequent to that shown by FIG. 10.

[0019]FIG. 12 is a view of the FIG. 10 wafer fragment at a processingstep subsequent to that shown by FIG. 11.

[0020]FIG. 13 is a diagrammatic sectional view of another alternateembodiment semiconductor wafer fragment at a processing step inaccordance with an aspect of the invention.

[0021]FIG. 14 is a diagrammatic sectional view of another alternateembodiment semiconductor wafer fragment at a processing step inaccordance with an aspect of the invention.

[0022]FIG. 15 is a view of the FIG. 14 wafer at a processing stepsubsequent to that shown by FIG. 14.

[0023]FIG. 16 is a view of the FIG. 15 wafer fragment at a processingstep subsequent that shown by FIG. 15.

[0024]FIG. 17 is a diagrammatic sectional view of another alternateembodiment semiconductor wafer fragment at a processing step inaccordance with an aspect of the invention.

[0025]FIG. 18 is a diagrammatic sectional view of still anotheralternate embodiment semiconductor wafer fragment at a processing stepin accordance with an aspect of the invention.

[0026]FIG. 19 is a view of the FIG. 18 wafer fragment at a processingstep subsequent that shown by FIG. 18.

[0027]FIG. 20 is a view of the FIG. 18 wafer fragment at a processingstep subsequent that shown by FIG. 19.

[0028]FIG. 21 is a view of the FIG. 18 wafer fragment at a processingstep subsequent that shown by FIG. 20.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] This disclosure of the invention is submitted in furtherance ofthe constitutional purposes of the U.S. Patent Laws “to promote theprogress of science and useful arts” (Article 1, Section 8).

[0030] Referring initially to FIGS. 1-3, a method of forming a layercomprising tungsten oxide is described. In the context of this document,“tungsten oxide” defines any of WO_(X), where “x” ranges from 1 to 3. Inthe depicted process, the method is described in conjunction with acapacitor forming method. FIG. 1 depicts a substrate in processindicated generally with reference numeral 10. Such comprises a base orunderlying layer/region 12 having a first capacitor electrode layer 14formed thereover. Region 12 might be comprised of a semiconductivesubstrate, such as a bulk monocrystalline silicon substrate having adiffusion region formed therein (not shown). Also by way of exampleonly, layer/region 12 might constitute an insulating layer orcombination of insulating and conductive and semiconductive layers. Inthe context of this document, the term “semiconductor substrate” or“semiconductive substrate” is defined to mean any constructioncomprising semiconductive material, including, but not limited to, bulksemiconductive materials such as a semiconductive wafer (either alone orin assemblies comprising other materials thereon), and semiconductivematerial layers (either alone or in assemblies comprising othermaterials). The term “substrate” refers to any supporting structure,including, but not limited to, the semiconductive substrates describedabove.

[0031] In one preferred embodiment, layer 14 comprises tungsten nitride,and even more preferably consists essentially of tungsten nitride,deposited to an example thickness of from about 150 Angstroms to about500 Angstroms. In the context of this document, “tungsten nitride”defines any of WN_(X), where “x” ranges from 0.2 to 5.0. Layer 14 can bedeposited or formed by any suitable technique, with low pressurechemical vapor deposition (LPCVD) being one example. Where, for example,layer 14 is to comprise or consist essentially of tungsten nitride,example precursor gases include WF₆, NH₃, H₂ and Ar. For a single wafersix liter processor, example gas flows rates include WF₆ at from about 2sccm to about 50 sccm, NH₃ at from 6 sccm to 150 sccm, H₂ at from about50 sccm to about 800 sccm, and Ar at from about 0 sccm to about 500sccm. The wafer temperature is preferably maintained at from about 300°C. to 700° C., with processor pressure being maintained at from about 50mTorr to 600 mTorr.

[0032] Referring to FIG. 2, at least some of the tungsten nitride oflayer 14 is oxidized under conditions effective to form a second layer16 which comprises tungsten oxide, and more preferably at least amajority of which comprises tungsten trioxide. As shown in FIG. 2, theoxidizing oxidizes only an outer portion of first layer 14 to formsecond layer 16, which in this example is in contact with firstcapacitor electrode layer 14. Further, layer 16 constitutes a firstcapacitor dielectric layer in the capacitor being formed in thisexemplary preferred implementation. Example preferred oxidizing includesdry oxidizing and/or wet oxidizing. Exemplary dry oxidizing comprisesplacing a substrate in a RTO or other oxidization chamber, andconducting oxidizing with or without plasma, and/or with or withoutultraviolet light. An exemplary wafer susceptor temperature during theoxidizing is from about 200° C. to about 800° C., with an exemplarypressure range being from about 200 mTorr to above atmospheric pressure.Preferred oxidizing gases include O₂, O₃, oxygen radical, N₂O, NO₂, NO,and mixtures thereof. Exemplary flow rates for such gases include fromabout 2 sccm to about 10 slm. Carrier gases such as Ar and/or He mightalso be included, with an exemplary flow rate being from about 3 sccm toabout 5 slm. Processing time might range anywhere from a few seconds toseveral minutes, or more. The processing of a tungsten nitride layerunder such conditions is typically largely self-limiting in tungstentrioxide growth to about 300 Angstroms thickness. A preferred powerwhere plasma is utilized is from 50 watts to about 1000 watts in a dualplate, capacitively coupled reactor. Further alternately where plasma isutilized, remote plasma might be used. Other embodiments, for exampleusing ultraviolet light, may of course be used.

[0033] The volume differential of WO₃ versus tungsten nitride is about2:1. Accordingly where WO₃ is the preferred form of WO_(X), an exemplarypreferred processing is to oxidize about half of the thickness of layer14 to produce layer 16 to be equal in thickness to the resulting layer14.

[0034] One example wet oxidization process includes dipping thesubstrate in a H₂O₂ solution. Such solution might constitute 100% H₂O₂or, by way of example, 100 parts of H₂O to 1 part of H₂O₂ (by weight).An exemplary temperature for the dipping includes 95° C. at ambientpressure. Alternate wet oxidizing includes exposing the substrate to aH₂O bath comprising O₃, such as by bubbling ozone through an elevatedtemperature water bath.

[0035] The subject oxidizings might form other forms of tungsten oxideincluding, by way of example only, tungsten dioxide and/or WO_(2.72) inW₁₈O₄₉ form. Most preferably, the subject oxidizings produce layer 16 toconsist essentially of tungsten oxide in the tungsten trioxide form.Tungsten trioxide has a dielectric constant of about 300 compared to isabout 40 for tungsten dioxide. Provision of a tungsten trioxide layer inthe above-described manners is considerably preferred over a directchemical vapor deposition of tungsten trioxide, due to a bettercapacitor film being produced.

[0036] Referring to FIG. 3, a second capacitor electrode layer 18 isformed over capacitor dielectric layer 16. Layer 18 preferablycomprises, and more preferably consists essentially of, tungstennitride. Capacitor dielectric layer 16 constitutes a capacitordielectric region received intermediate first capacitor electrode 14 andsecond capacitor electrode 18. In the preferred embodiment, first andsecond capacitor electrode layers 14 and 16, respectively, are incontact with tungsten trioxide of first capacitor dielectric layer 16. Apreferred thickness for layer 18 is from about 50 Angstroms to about 500Angstroms.

[0037] The above-described example showed oxidizing only a portion offirst layer 14 to form second layer 16. Alternate exemplary processingis described with reference to FIGS. 4 and 5. Like numerals from thefirst described embodiment are utilized where appropriate, withdifferences being indicated with different numerals or the suffix “a”.FIG. 4 illustrates a substrate 10 a having a first capacitor electrodelayer 20 formed over a suitable substrate 12. A second layer 22comprising tungsten nitride is formed over first capacitor electrodelayer 20. First capacitor electrode layer 20 ideally does not compriseany tungsten nitride. Example materials for layer 20 include platinum,rhodium oxide, ruthenium oxide, titanium oxide, and other noble metalsand conducting or semiconductive oxides.

[0038] Referring to FIG. 5, wafer fragment 10 a has been exposed tooxidizing conditions effectively to oxidize essentially all of firstlayer 22 to form a second capacitor electrode layer 24 comprisingtungsten oxide, and more preferably that consists essentially oftungsten trioxide.

[0039] Referring to FIG. 6, a third capacitor electrode layer 26 isformed over second capacitor electrode layer 24. Example materials forlayer 26 include tungsten nitride, tungsten, ruthenium oxide, titaniumnitride, platinum, aluminum and copper.

[0040] The above-described processings showed the oxidizings occurringbefore the outer capacitor electrode layer was formed. The exemplaryembodiment of FIGS. 7 and 8 shows processing whereby oxidizing occursafter forming of the outer capacitor electrode layer. Like numerals fromthe first embodiment are utilized where appropriate, with differencesbeing indicated with different numerals or with the suffix “b”. FIG. 7illustrates a wafer fragment 10 b having a first capacitor electrodelayer 28 formed over a substrate layer 12. A tungsten nitride comprisinglayer 30, preferably consisting essentially of tungsten nitride, isformed over layer 28. A third or outer capacitor electrode layer 32 isformed over layer 30. The composition of layer 32 is ideally chosen tocomprise a conductive material diffusive to oxygen and which itself doesnot oxidize, or does oxidize to form a conductive oxide. Examplematerials include platinum, platinum alloy, ruthenium, ruthenium oxide,rhodium, rhodium oxide, or titanium.

[0041] Referring to FIG. 8, wafer fragment 10 b has been subjected tosuitable oxidizing conditions, such as described above, effective totransform at least some of the tungsten nitride, and preferably all asshown, into a tungsten trioxide comprising capacitor dielectric layer34.

[0042]FIG. 9 illustrates an alternate embodiment 10 c, whereby only someof the tungsten nitride of layer 30 has been transformed into a tungstenoxide layer 34 c.

[0043] Another alternate embodiment is described with reference to FIGS.10-12. FIG. 10 depicts a wafer fragment 40 comprised of a substrateregion or layer 42 having a first capacitor electrode layer 44 formedthereover. An exemplary preferred material for layer 44 is tungstennitride. A high k dielectric layer 46 is formed over first capacitorelectrode layer 44. In the context of this document, “high k” denotesany material having a dielectric constant of at least 20. An exemplaryand preferred material for layer 46 comprises Ta₂O₅ deposited by anysuitable technique, such as by chemical vapor deposition. A tungstennitride comprising layer 48 is formed over high k dielectric layer 46.

[0044] Referring to FIG. 11, substrate 40 is subjected to suitableoxidizing conditions to oxidize the tungsten nitride of layer 48effective to transform substantially all of it to a tungsten oxidizecomprising layer 50 received over high k capacitor dielectric layer 46.At least a majority portion of the tungsten oxide is preferably intungsten trioxide form, with layer 50 more preferably consistingessentially of tungsten trioxide.

[0045] Referring to FIG. 12, a second capacitor electrode layer 52 isformed over tungsten oxide comprising layer 50. Layer 52 preferablycomprises, and more preferably consists essentially of, tungstennitride.

[0046] Another alternate embodiment is depicted in a wafer fragment 40 ain FIG. 13. Like numerals from the FIGS. 10-12 embodiment have beenutilized where appropriate, with differences being indicated withdifferent numerals, or with the suffix “a”. FIG. 13 depicts a capacitordielectric region 45 received intermediate first capacitor electrodelayer 44 and second capacitor electrode layer 52. Capacitor dielectricregion 45 comprises a first tungsten trioxide comprising layer 43(preferably consisting essentially of tungsten trioxide) in contact withfirst capacitor electrode layer 44. A second tungsten trioxidecomprising layer 49 (preferably consisting essentially of tungstentrioxide) is received in contact with second capacitor electrode 52. Ahigh k dielectric layer 46 is received intermediate first tungstentrioxide comprising layer 43 and second tungsten trioxide comprisinglayer 49. Accordingly in the preferred implementation, high k dielectriclayer 46 contacts both first tungsten trioxide layer 43 and secondtungsten trioxide comprising layer 49. A preferred material for layer 46is Ta₂O₅.

[0047] A method of forming a field effect transistor in accordance withbut one aspect of the invention is described with reference to FIGS.14-16. FIG. 14 depicts a semiconductor wafer fragment 60 comprised of abulk semiconductive substrate 62. A tungsten nitride comprising layer 64is formed over substrate 62. Layer 64 preferably consists essentially oftungsten nitride, with an exemplary thickness being 20 Angstroms.Substrate 62 in the illustrated example will comprise a semiconductivechannel region 67.

[0048] Referring to FIG. 15, tungsten nitride comprising layer 64 isoxidized under conditions effective to transform at least some of it,and preferably all as shown, to a tungsten oxide comprising gatedielectric layer 66. Preferably, at least a majority of the tungstenoxide is in tungsten trioxide form, and even more preferably, layer 66consists essentially of tungsten trioxide. Layer 66 might also compriseSiO₂.

[0049] Referring to FIG. 16, a transistor gate construction 68 andsource/drain regions 70 have been formed relative to the substrate. Gateconstruction 68 preferably comprises one or more conductive gate layers72 which are capped by insulating sidewall spacers and caps 74. Gate 72might comprise any unoxidized portion of tungsten nitride layer 64 whichwas converted to layer 66. Some provides but examples of providing atransistor gate 72 operably proximate gate dielectric layer 66, andsource/drain regions 76 are provided operably proximate transistor gate72. Preferably, gate 72 comprises tungsten nitride, and even morepreferably consists essentially of tungsten nitride. Alternateprocessing could, of course, be provided for formation of a gate 72operably proximate gate dielectric layer 66. Further, and by way ofexample, the transistor gate might be provided or otherwise formed priorto formation of tungsten oxide comprising gate dielectric region 66,such as by forming a bottom gated bulk or thin film transistorconstruction.

[0050] An alternate embodiment field effect transistor is described withreference to FIG. 17. Like numerals from the FIG. 16 embodiment areutilized where appropriate, with differences being indicated by thesuffix “a” or with different numerals. Gate construction 68 a comprisesa gate dielectric region 80 comprising a combination of tungsten oxideand silicon dioxide. The tungsten oxide of gate dielectric region 80preferably comprises tungsten dioxide or tungsten trioxide, and mostpreferably consists essentially of tungsten trioxide. In the preferredembodiment as shown, dielectric region 80 comprises a layer 81 and alayer 82, one of which preferably comprises tungsten oxide and the otherof which comprises silicon dioxide. In such instances, either thetungsten oxide layer can be received over the silicon dioxide layer, orthe silicon dioxide layer received over the tungsten oxide layer.Preferably, gate dielectric region 80 is the only dielectric regionintermediate gate 72 and semiconductive channel 67, with the gatedielectric region consisting essentially of tungsten oxide and silicondioxide.

[0051] Depicted layers 81 and 82 could be formed by any of a number ofmanners, including chemical vapor deposition and/or thermal oxidations.Gate 72 preferably comprises one or more conductive or semiconductivelayers including tungsten in elemental or compound form, and/orconductively doped polysilicon. Tungsten nitride is one preferredmaterial for gate 72.

[0052] An alternate method of forming a field effect transistor isdescribed with reference to FIGS. 18-21. FIG. 18 depicts a semiconductorwafer fragment 84 comprised of a bulk semiconductive substrate 85. Abeginning gate construction 87 has been formed, and comprises a gatedielectric region 88, a tungsten nitride comprising gate region 89 andan insulative capping layer 90. Such have preferably been patterned asshown.

[0053] Referring to FIG. 19, gate region 89 has been oxidized underconditions effective to transform at least some of the tungsten nitrideto tungsten oxide. In the depicted embodiment, only some of the tungstennitride has been oxidized to form tungsten oxide regions 91. Processingto produce the FIG. 19 construction might be dedicated or an undesiredbyproduct of the wafer processing. Further, such oxidizing andconditions might be effective to transform all of tungsten nitridecomprising gate layer 89 of FIG. 18 to tungsten oxide.

[0054] Referring to FIG. 20, the gate region has been nitridized underconditions effective to transform at least some of the tungsten oxideand preferably all as shown to tungsten nitride comprising material 89.The transformed tungsten nitride might be of the same, different orcombination of forms as the term “tungsten nitride” has been definedearlier in this document. Example preferred nitridizing conditionsinclude an atmosphere of one or both of H₂/N₂ and NH₃. Example preferredtemperature during the processing is from 500° C. to 900° C. and from 1Torr to atmospheric pressure. If just hydrogen or a very hydrogenenriched atmosphere is utilized, such example conditions would typicallytransform the tungsten oxide to elemental tungsten.

[0055] Referring to FIG. 21, source/drain regions 92 have been formedrelative to the substrate, as well as insulative gate sidewall spacers94.

[0056] In compliance with the statute, the invention has been describedin language more or less specific as to structural and methodicalfeatures. It is to be understood, however, that the invention is notlimited to the specific features shown and described, since the meansherein disclosed comprise preferred forms of putting the invention intoeffect. The invention is, therefore, claimed in any of its forms ormodifications within the proper scope of the appended claimsappropriately interpreted in accordance with the doctrine ofequivalents.

1. A method of forming a layer comprising tungsten oxide, comprising:forming a first layer comprising tungsten nitride over a substrate; andoxidizing the tungsten nitride under conditions effective to form asecond layer which comprises tungsten oxide.
 2. The method of claim 1wherein the tungsten oxide comprises tungsten trioxide.
 3. The method ofclaim 1 wherein the tungsten oxide comprises tungsten dioxide.
 4. Themethod of claim 1 wherein the tungsten oxide comprises WO_(2.72) inW₁₈O₄₉ form.
 5. The method of claim 1 wherein the oxidizing oxidizesonly an outer portion of the first layer to form the second layer overand in contact with the first layer.
 6. The method of claim 5 whereinthe first layer consists essentially of tungsten nitride.
 7. The methodof claim 1 wherein the first layer consists essentially of tungstennitride, and the oxidizing oxidizes essentially all of the first layerto form the second layer to consist essentially of tungsten trioxide. 8.A method of forming a layer comprising tungsten oxide, comprising:forming a first layer comprising tungsten nitride over a substrate; andoxidizing the tungsten nitride under conditions effective to form asecond layer at least a majority of which comprises tungsten trioxide.9. The method of claim 8 wherein the oxidizing forms the second layer tocomprise tungsten dioxide.
 10. The method of claim 8 wherein theoxidizing forms the second layer to comprise WO_(2.72) in W₁₈O₄₉ form.11. The method of claim 8 wherein the oxidizing forms the second layerto consist essentially of tungsten trioxide.
 12. The method of claim 8wherein the oxidizing oxidizes only a portion of the first layer to formthe second layer over and in contact with the first layer.
 13. Themethod of claim 8 wherein the oxidizing oxidizes only an outer portionof the first layer to form the second layer over and in contact with thefirst layer.
 14. The method of claim 12 wherein the first layer consistsessentially of tungsten nitride.
 15. The method of claim 8 wherein thefirst layer consists essentially of tungsten nitride, and the oxidizingoxidizes essentially all of the first layer to form the second layer toconsist essentially of tungsten trioxide.
 16. The method of claim 8wherein the oxidizing comprises dry oxidizing in an environmentcontaining oxygen.
 17. The method of claim 16 wherein the conditionscomprise presence of an oxygen containing gas, temperature from about200° C. to about 800° C., and pressure from about 200 mTorr to about 760Torr.
 18. The method of claim 17 wherein the oxygen containing gascomprises at least one of O₂, O₃ and an oxygen radical.
 19. The methodof claim 8 wherein the oxidizing comprises wet oxidizing.
 20. The methodof claim 19 wherein the oxidizing comprises dipping the substrate in aH₂O₂ comprising solution.
 21. The method of claim 19 wherein theoxidizing comprises exposing the substrate to H₂O comprising O₃.
 22. Acapacitor forming method comprising: forming a first capacitor electrodelayer over a substrate; forming a second layer comprising tungstennitride over the first capacitor electrode layer; forming a thirdcapacitor electrode layer over the second layer; and oxidizing thesecond layer under conditions effective to transform at least some ofthe tungsten nitride into a tungsten trioxide comprising capacitordielectric layer.
 23. The method of claim 22 wherein the oxidizingoccurs before forming the third capacitor electrode layer.
 24. Themethod of claim 22 wherein the oxidizing occurs after forming the thirdcapacitor electrode layer.
 25. The method of claim 22 wherein theoxidizing oxidizes only some of the tungsten nitride into tungstentrioxide.
 26. The method of claim 22 wherein the oxidizing oxidizesessentially all of the tungsten nitride into tungsten trioxide.
 27. Themethod of claim 22 wherein at least one of the first and secondcapacitor electrode layers comprises tungsten nitride.
 28. The method ofclaim 22 wherein both of the first and second capacitor electrode layerscomprise tungsten nitride.
 29. The method of claim 22 wherein both ofthe first and second capacitor electrode layers consist essentially oftungsten nitride.
 30. A capacitor forming method comprising: forming afirst capacitor electrode layer comprising tungsten nitride over asubstrate; oxidizing at least some of the tungsten nitride underconditions effective to form a first capacitor dielectric layer at leasta majority of which comprises tungsten trioxide in contact with thefirst capacitor electrode layer; and forming a second capacitorelectrode layer over the first capacitor dielectric layer.
 31. Themethod of claim 30 comprising forming a second high k capacitordielectric layer over the first capacitor dielectric layer prior toforming the second capacitor electrode layer.
 32. The method of claim 30wherein the first capacitor electrode layer consists essentially oftungsten nitride.
 33. The method of claim 30 wherein the secondcapacitor electrode layer comprises tungsten nitride.
 34. The method ofclaim 30 wherein the second capacitor electrode layer consistsessentially of tungsten nitride.
 35. The method of claim 30 comprisingforming the second capacitor electrode layer to be in contact withtungsten trioxide of the first capacitor dielectric layer.
 36. Themethod of claim 30 wherein the second capacitor electrode layercomprises tungsten nitride, the tungsten nitride of the first and secondcapacitor electrode layers being in contact with the tungsten trioxideof the first capacitor dielectric layer.
 37. The method of claim 30wherein the first capacitor electrode layer consists essentially oftungsten nitride, the second capacitor electrode layer consistsessentially of tungsten nitride, and the first and second capacitorelectrode layers are in contact with tungsten trioxide of the firstcapacitor dielectric layer.
 38. The method of claim 30 wherein theoxidizing forms the first capacitor dielectric layer to consistessentially of tungsten trioxide.
 39. A capacitor forming methodcomprising: forming a first capacitor electrode layer over a substrate;forming a high k capacitor dielectric layer over the first capacitorelectrode layer; forming a tungsten nitride comprising layer over thehigh k dielectric layer; oxidizing the tungsten nitride under conditionseffective to transform substantially all of it to a tungsten oxidecomprising layer received over the high k capacitor dielectric layer, atleast a majority portion of the tungsten oxide being in tungstentrioxide form; and forming a second capacitor electrode layer over thetungsten oxide comprising layer.
 40. The method of claim 39 wherein thehigh k capacitor dielectric layer comprises Ta₂O₅.
 41. The method ofclaim 39 wherein at least one of the first and second capacitorelectrode layers comprises tungsten nitride.
 42. The method of claim 39wherein both of the first and second capacitor electrode layers comprisetungsten nitride.
 43. The method of claim 39 wherein essentially all ofthe tungsten oxide is in the tungsten trioxide form.
 44. A capacitorforming method comprising: forming a first capacitor electrode layerover a substrate, the first capacitor electrode layer not comprisingtungsten nitride; forming a tungsten nitride comprising layer over thefirst capacitor electrode comprising layer; oxidizing at least some ofthe tungsten nitride under conditions effective to form a layer at leasta majority of which comprises tungsten trioxide; and after theoxidizing, forming a second capacitor electrode layer over the layercomprising tungsten trioxide.
 45. The method of claim 44 wherein theoxidizing oxidizes only some of the tungsten nitride into tungstentrioxide.
 46. The method of claim 44 wherein the oxidizing oxidizesessentially all of the tungsten nitride into tungsten trioxide.
 47. Themethod of claim 44 comprising forming the second capacitor electrodelayer in contact with the layer comprising tungsten trioxide.
 48. Acapacitor comprising: a first capacitor electrode; a second capacitorelectrode; a capacitor dielectric region intermediate the first and thesecond capacitor electrodes, the capacitor dielectric region comprising:a first tungsten trioxide comprising layer in contact with the firstcapacitor electrode; a second tungsten trioxide comprising layer incontact with the second capacitor electrode; and a high k dielectriclayer intermediate the first and the second tungsten trioxide comprisinglayers.
 49. The capacitor of claim 48 wherein the capacitor dielectricregion consists essentially of said first tungsten trioxide comprisinglayer, said second tungsten trioxide comprising layer, and said high kdielectric layer.
 50. The capacitor of claim 48 wherein the high kdielectric layer contacts both the first and second tungsten trioxidecomprising layers.
 51. The capacitor of claim 48 wherein at least one ofthe first tungsten trioxide comprising layer or the second tungstentrioxide comprising layer consists essentially of tungsten trioxide. 52.The capacitor of claim 48 wherein both of the first tungsten trioxidecomprising layer and the second tungsten trioxide comprising layerconsist essentially of tungsten trioxide.
 53. The capacitor of claim 48wherein at least one of the first and second electrodes comprisestungsten nitride.
 54. The capacitor of claim 48 wherein both the firstand second electrodes comprise tungsten nitride.
 55. The capacitor ofclaim 48 wherein both the first and second electrodes consistessentially of tungsten nitride.
 56. The capacitor of claim 48 whereinboth the first and second electrodes comprise tungsten nitride, thecapacitor dielectric region consists essentially of said first tungstentrioxide comprising layer, said second tungsten trioxide comprisinglayer, and said high k dielectric layer.
 57. The capacitor of claim 56wherein at least one of the first tungsten trioxide comprising layer orthe second tungsten trioxide comprising layer consists essentially oftungsten trioxide.
 58. The capacitor of claim 56 wherein both of thefirst tungsten trioxide comprising layer and the second tungstentrioxide comprising layer consist essentially of tungsten trioxide. 59.A capacitor comprising: a first tungsten nitride comprising capacitorelectrode; a second tungsten nitride comprising capacitor electrode; acapacitor dielectric region intermediate the first and the secondcapacitor electrodes, the capacitor dielectric region comprising atungsten trioxide comprising layer in contact with the first capacitorelectrode and the second capacitor electrode.
 60. The capacitor of claim59 wherein at least one of the first and second capacitor electrodesconsists essentially of tungsten nitride.
 61. The capacitor of claim 59wherein both of the first and second capacitor electrodes consistessentially of tungsten nitride.
 62. The capacitor of claim 59 whereinthe tungsten trioxide comprising layer consists essentially of tungstentrioxide.
 63. The capacitor of claim 62 wherein at least one of thefirst and second capacitor electrodes consists essentially of tungstennitride.
 64. The capacitor of claim 62 wherein both of the first andsecond capacitor electrodes consist essentially of tungsten nitride. 65.A method of forming a field effect transistor comprising: forming atungsten nitride comprising layer proximate at least one of asemiconductive channel region or a conductive gate layer; oxidizing thetungsten nitride comprising layer under conditions effective totransform at least some of the tungsten nitride to a tungsten oxidecomprising gate dielectric layer; and providing a transistor gateoperably proximate the gate dielectric layer, and providing source/drainregions operably proximate the transistor gate.
 66. The method of claim65 wherein at least a majority of the tungsten oxide is in tungstentrioxide form.
 67. The method of claim 65 wherein the oxidizing oxidizesessentially all of the tungsten nitride to tungsten oxide.
 68. Themethod of claim 65 wherein the tungsten nitride comprising layerconsists essentially of tungsten nitride.
 69. The method of claim 65wherein the tungsten nitride comprising layer consists essentially oftungsten nitride, the oxidizing oxidizes essentially all of the tungstennitride to tungsten oxide.
 70. The method of claim 65 wherein theconditions comprise presence of an oxygen containing gas, temperaturefrom about 200° C. to about 800° C., and pressure from about 200 mTorrto about 760 Torr.
 71. The method of claim 65 comprising forming thetransistor gate to comprise tungsten nitride.
 72. The method of claim 65comprising forming the transistor gate to consist essentially oftungsten nitride.
 73. The method of claim 65 wherein the oxidizingoxidizes less than all of the tungsten nitride to tungsten oxide,leaving at least some of the tungsten nitride to form at least a portionof the transistor gate.
 74. The method of claim 65 comprising forming atleast some of the gate dielectric layer to comprise SiO₂.
 75. A fieldeffect transistor comprising: a gate; a semiconductive channel;source/drain regions opposingly proximate the semiconductive channel; agate dielectric region intermediate the gate and the semiconductivechannel; and the gate dielectric region comprising tungsten oxide, thegate comprising tungsten nitride.
 76. The field effect transistor ofclaim 75 wherein the tungsten oxide of the gate dielectric region andthe tungsten nitride of the gate are in contact with one another. 77.The field effect transistor of claim 75 wherein at least a majority ofthe tungsten oxide is in tungsten trioxide form.
 78. The field effecttransistor of claim 75 wherein the gate dielectric region is the onlydielectric region intermediate the gate and the semiconductive channel,the gate dielectric region consisting essentially of tungsten oxide. 79.The field effect transistor of claim 75 wherein the gate dielectricregion is the only dielectric region intermediate the gate and thesemiconductive channel, the gate dielectric region consistingessentially of tungsten oxide, at least a majority of the tungsten oxidebeing in tungsten trioxide form.
 80. The field effect transistor ofclaim 75 wherein the gate dielectric region is the only dielectricregion intermediate the gate and the semiconductive channel, the gatedielectric region consisting essentially of tungsten oxide, essentiallyall of the tungsten oxide being in tungsten trioxide form.
 81. A fieldeffect transistor comprising: a gate; a semiconductive channel;source/drain regions opposingly proximate the semiconductive channel;and a gate dielectric region intermediate the gate and thesemiconductive channel, the gate dielectric region comprising acombination of tungsten oxide and silicon dioxide.
 82. The field effecttransistor of claim 81 wherein the tungsten oxide of the gate dielectricregion comprises tungsten dioxide.
 83. The field effect transistor ofclaim 81 wherein the tungsten oxide of the gate dielectric regioncomprises tungsten trioxide.
 84. The field effect transistor of claim 81wherein the tungsten oxide of the gate dielectric region consistsessentially of tungsten trioxide.
 85. The field effect transistor ofclaim 81 wherein the dielectric region comprises a tungsten oxide layerand a silicon dioxide layer, the tungsten oxide layer being receivedover the silicon dioxide layer.
 86. The field effect transistor of claim85 wherein the tungsten oxide layer consists essentially of tungstentrioxide.
 87. The field effect transistor of claim 81 wherein thedielectric region comprises a tungsten oxide layer and a silicon dioxidelayer, the silicon dioxide layer being received over the tungsten oxidelayer.
 88. The field effect transistor of claim 87 wherein the tungstenoxide layer consists essentially of tungsten trioxide.
 89. The fieldeffect transistor of claim 81 wherein the gate dielectric region is theonly dielectric region intermediate the gate and the semiconductivechannel, the gate dielectric region consisting essentially of tungstenoxide and silicon dioxide.
 90. The field effect transistor of claim 89wherein the tungsten oxide of the gate dielectric region consistsessentially of tungsten trioxide.
 91. The field effect transistor ofclaim 89 wherein the dielectric region comprises a tungsten oxide layerand a silicon dioxide layer, the tungsten oxide layer being receivedover the silicon dioxide layer.
 92. The field effect transistor of claim89 wherein the dielectric region comprises a tungsten oxide layer and asilicon dioxide layer, the silicon dioxide layer being received over thetungsten oxide layer.
 93. A field effect transistor comprising: a gatecomprising tungsten; a semiconductive channel; source/drain regionsopposingly proximate the semiconductive channel; and a gate dielectricregion intermediate the gate and the a semiconductive channel, the gatedielectric region comprising a combination of tungsten oxide and silicondioxide.
 94. The field effect transistor of claim 93 wherein thetungsten is in compound form.
 95. The field effect transistor of claim93 wherein the tungsten is in elemental form.
 96. The field effecttransistor of claim 95 wherein the tungsten oxide of the gate dielectricregion comprises tungsten dioxide.
 97. The field effect transistor ofclaim 95 wherein the tungsten oxide of the gate dielectric regioncomprises tungsten trioxide.
 98. The field effect transistor of claim 95wherein the tungsten oxide of the gate dielectric region consistsessentially of tungsten trioxide.
 99. The field effect transistor ofclaim 95 wherein the dielectric region comprises a tungsten oxide layerand a silicon dioxide layer, the tungsten oxide layer being receivedover the silicon dioxide layer.
 100. The field effect transistor ofclaim 99 wherein the tungsten oxide layer consists essentially oftungsten trioxide.
 101. The field effect transistor of claim 95 whereinthe dielectric region comprises a tungsten oxide layer and a silicondioxide layer, the silicon dioxide layer being received over thetungsten oxide layer.
 102. The field effect transistor of claim 101wherein the tungsten oxide layer consists essentially of tungstentrioxide.
 103. The field effect transistor of claim 93 wherein thetungsten comprises tungsten nitride.
 104. The field effect transistor ofclaim 103 wherein the tungsten oxide of the gate dielectric regioncomprises tungsten dioxide.
 105. The field effect transistor of claim103 wherein the tungsten oxide of the gate dielectric region comprisestungsten trioxide.
 106. The field effect transistor of claim 103 whereinthe tungsten oxide of the gate dielectric region consists essentially oftungsten trioxide.
 107. The field effect transistor of claim 103 whereinthe dielectric region comprises a tungsten oxide layer and a silicondioxide layer, the tungsten oxide layer being received over the silicondioxide layer.
 108. The field effect transistor of claim 107 wherein thetungsten oxide layer consists essentially of tungsten trioxide.
 109. Amethod of forming a field effect transistor comprising: forming atungsten nitride comprising gate region; oxidizing the gate region underconditions effective to transform at least some of the tungsten nitrideto tungsten oxide; and after the oxidizing, nitridizing the gate regionunder conditions effective to transform at least some of the tungstenoxide to tungsten nitride; and providing a gate dielectric region, asemiconductive channel region and source/drain regions operablyproximate the gate region.
 110. The method of claim 109 wherein theoxidizing transforms substantially all of the tungsten nitride of thegate region to tungsten oxide.
 111. The method of claim 109 wherein thenitridizing transforms substantially all of the transformed tungstenoxide to tungsten nitride.
 112. The method of claim 109 wherein theoxidizing transforms substantially all of the tungsten nitride of thegate region to tungsten oxide, and the nitridizing transformssubstantially all of the transformed tungsten oxide to tungsten nitride.113. The method of claim 109 wherein the oxidizing transforms only someof the tungsten nitride of the gate region to tungsten oxide.
 114. Themethod of claim 109 wherein the nitridizing transforms only some of thetransformed tungsten oxide to tungsten nitride.
 115. The method of claim109 wherein the nitridizing conditions comprise at least one of an N₂and NH₃ environment.
 116. A method of forming a field effect transistorcomprising: forming a tungsten nitride comprising gate region; oxidizingthe gate region under conditions effective to transform at least some ofthe tungsten nitride to tungsten oxide; and after the oxidizing,exposing the gate region to conditions effective to transform at leastsome of the tungsten oxide to tungsten; and providing a gate dielectricregion, a semiconductive channel region and source/drain regionsoperably proximate the gate region.
 117. The method of claim 116 whereinthe oxidizing transforms substantially all of the tungsten nitride ofthe gate region to tungsten oxide.
 118. The method of claim 116 whereinthe exposing transforms substantially all of the transformed tungstenoxide to tungsten.
 119. The method of claim 116 wherein the oxidizingtransforms substantially all of the tungsten nitride of the gate regionto tungsten oxide, and the exposing transforms substantially all of thetransformed tungsten oxide to tungsten.
 120. The method of claim 116wherein the oxidizing transforms only some of the tungsten nitride ofthe gate region to tungsten oxide.
 121. The method of claim 116 whereinthe exposing transforms only some of the transformed tungsten oxide totungsten.
 122. The method of claim 116 wherein the exposing conditionscomprise an H₂ environment.